1. Field of Invention
The present invention relates to an accelerated test method and system. More particularly, the present invention relates to an accelerated test method and system using a one-way-hash function to reduce the integrated circuit test time.
2. Description of Related Art
In the integrated circuit industry, test time is a substantial expense factor in the total cost of device production, especially for the latest multi-million gate designs. In some cases, the cost of the test is higher than the manufacturing cost. Shortening the test time will reduce the production cost.
FIG. 1 shows a traditional verification method used in an integrated circuit test. The traditional verification method relies on data analysis of the test, recorded and analyzed sequentially. For example, a large amount of test vector data 102 is sent to the integrated circuit 104 and the response data 106 is produced in response to the test vector data 102. The response data 106 is recorded and analyzed in the automated test equipment (ATE) 108. A database 110 that stores standard response data is used in the verification process in the automated test equipment 108. Since there is a lot of response data 106 to be verified, the test process consumes a large amount of automated test equipment resource as well as test time.